Extra:Page Access Codes

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Depends on Memory Protection

This won’t make much sense until you’re read the memory protection article. (Hopefully it will, afterwards!)

These are the 32-bit ARM MMU Access Permission codes. Each page table entry has a 2-bit ‘AP’ code: the interpretation of one code can be varied globally by two other bits {S, R}.

AP   S R     Supervisor     User
00 0 0 No access No access
00 1 0 Read only No access
00 0 1 Read only Read only
00 1 1 <unused> <unused>
01 - - Read/write No access
10 - - Read/write Read only
11 - - Read/write Read/write

Note that this is just one way to code one chosen set of access permissions – but it serves to show the sort of settings which might be useful.