Main Page: Difference between revisions

From Engineering Wiki
Jump to navigation Jump to search
gravatar Mbasszjg [userbureaucrateditorsysopPHRhYmxlIGNsYXNzPSJ0d3BvcHVwIj48dHI+PHRkIGNsYXNzPSJ0d3BvcHVwLWVudHJ5dGl0bGUiPkdyb3Vwczo8L3RkPjx0ZD51c2VyPGJyIC8+YnVyZWF1Y3JhdDxiciAvPmVkaXRvcjxiciAvPnN5c29wPGJyIC8+PC90ZD48L3RyPjwvdGFibGU+] (talk | contribs)
mNo edit summary
gravatar Mbasszjg [userbureaucrateditorsysopPHRhYmxlIGNsYXNzPSJ0d3BvcHVwIj48dHI+PHRkIGNsYXNzPSJ0d3BvcHVwLWVudHJ5dGl0bGUiPkdyb3Vwczo8L3RkPjx0ZD51c2VyPGJyIC8+YnVyZWF1Y3JhdDxiciAvPmVkaXRvcjxiciAvPnN5c29wPGJyIC8+PC90ZD48L3RyPjwvdGFibGU+] (talk | contribs)
No edit summary
 
(One intermediate revision by the same user not shown)
Line 32: Line 32:


| title2 = RISC-V
| title2 = RISC-V
| image2 = Cpu-ARM-icon.png
| image2 = RISC-V-logo-square.png
| right1 = [[RISC-V Basics | RISC-V Basics (under development)]]  
| right1 = [[RISC-V Basics | RISC-V Basics (under development)]]  
| right2 = [[UOM RISC-V assembler | U of M RISC-V assembler]]  
| right2 = [[UOM RISC-V assembler | U of M RISC-V assembler]]  
| right3 = [[RISC-V ABI | Application Binary Interface (ABI)]]
}}
}}



Latest revision as of 15:50, 2 August 2025

Welcome to the School of CS Engineering Wiki
This is the homepage for the engineering activities in the School of CS. This wiki contains information on a number of engineering related subjects. The material can be used to support engineering modules in School, engineering projects, student hobby projects, or as a source of general hardware related information. The information is split up into sensible categories - where you can find general background information, examples and FAQs. If you are not sure where to look, try the search box in the top right hand corner.


CAD Tools
Logic Design
Lab Boards
RISC-V


Verilog
System Verilog


Laboratory Equipment
MU0 and Stump
Tutorials
Quizzes