Bennett/Requirements

Base Requirements

• Multiplatform (Linux/Windows. Mac if possible, but has serious challenges)
• Needs to support different different architectures: ARM, RISC-V, [others]
  • Needs to be configurable to 8, 16, 24, 32, or 64 bit architecture
  • Needs to support different memory models, different register configurations, etc
  • Needs simulator for target architectures, or to communicate with a lab board
• Display of CPU registers (will depend on architecture)
• Display of Status Flags (will depend on architecture)
• Memory view, with optional disassembly. View should be configurable to show different memory views - single word, multiple words, ascii characters, disassembly. (word size and disassembly will depend on architecture)
• Multiple memory views
• Breakpoints (stop on memory address)
• Watchpoint (stop on value at address)
• CPU controls: step [single, multiple], run, reset - is continue just another form of 'run'?
• Output console
• Needs to be extensible to support different simulated memory-mapped peripherals. Peripherals separate from architecture?